Design of a High frequency Hysteresis-Controlled CMOS Buck Converter for low power Applications

This paper presents the design of a 20 MHzhysteresis-controlled CMOS buck converter using pseudo ramp techniques for ultra-low power applications. The proposed buck converter can improve the transient response using hysteresis-controlled and fixed-voltage band techniques. Using pseudo ramp technique, pseudo inductor current signal can be produced to reduce the output voltage ripple. At the same time, the sub-1V structure leads to low power dissipation. Moreover, by adopting the inverter-based low-voltage error amplifier topology, the proposed buck converter becomes most suitable for the low-power applications.The prototype of buck converter has been designed with 180nm 2P3M CMOS technology. The operating frequency of proposed converter is 20 MHz, with an inductor of 8.5 μH and a capacitor of 330 nF. Experimental results show that the output voltage is 0.5 V, the load current is 27 mA.